Fabrication and characterization of 0.24 Micron CMOS device by using simulation / Nazirah Mohamat Kasim, Rosfariza Radzali and Ahmad Puad Ismail

Simulation and analyzing the electrical characteristics of 0.24 micron CMOS device was done by using Silvaco TCAD. Electrical characteristics were carried out by using Atlas device simulator, while for simulation the process was carried out by using Athena process simulator to modify theoretical val...

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Bibliographic Details
Main Authors: Mohamat Kasim, Nazirah (Author), Radzali, Rosfariza (Author), Ismail, Ahmad Puad (Author)
Format: Book
Published: Universiti Teknologi MARA, Pulau Pinang & Pusat Penerbitan Universiti (UPENA), 2010.
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100 1 0 |a Mohamat Kasim, Nazirah  |e author 
700 1 0 |a Radzali, Rosfariza  |e author 
700 1 0 |a Ismail, Ahmad Puad  |e author 
245 0 0 |a Fabrication and characterization of 0.24 Micron CMOS device by using simulation / Nazirah Mohamat Kasim, Rosfariza Radzali and Ahmad Puad Ismail 
260 |b Universiti Teknologi MARA, Pulau Pinang & Pusat Penerbitan Universiti (UPENA),   |c 2010. 
500 |a https://ir.uitm.edu.my/id/eprint/16338/1/AJ_NAZIRAH%20MOHAMAT%20KASIM%20ESTEEM%2010.pdf 
520 |a Simulation and analyzing the electrical characteristics of 0.24 micron CMOS device was done by using Silvaco TCAD. Electrical characteristics were carried out by using Atlas device simulator, while for simulation the process was carried out by using Athena process simulator to modify theoretical values and obtain more accurate process parameters. The electrical parameter was extracted to investigate the device characteristics. Several design analyses were performed to investigate the effectiveness of the advanced method in order to prevent the varying of threshold voltage. The electrical characteristics produce the graph of drain current versus drain voltage, lD-VG and drain current versus gate voltage, lD-VG . From lD-VG can be obtained the threshold voltage, VT in which VT for NMOS transistor is lower than VT for PMOS transistor which is 0.6695V and -0.9683 V respectively. The gate length LG obtained from the simulation for NMOS and PMOS is the same which is 0.235 micron and it is nearest to the scale for this research work. 
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