Implementation of Pipelined FFT Processor on FPGA Microchip Proposed for Mechanical Applications / Siti Lailatul Mohd Hassan...[et al.]

• Main Authors: Mohd Hassan, Siti Lailatul (Author), Sulaiman, Nasri (Author), Jaafar, Haslina (Author), Saparon, Azilah (Author)
• Format: Book
• Published: Faculty of Mechanical Engineering Universiti Teknologi MARA (UiTM), 2017.
• Subjects: Article; PeerReviewed
• Online Access: Link Metadata

Summary

Fast Fourier transform (FFT) is an efficient algorithm for discrete Fourier transform (DFT) which computes any signal in time domain into frequency domain. FFT processor is a hardware implementation for FFT algorithm. This processor is widely used in many applications such as wireless sensor networks, medical imaging, geophysics and mechanical applications. These applications require a low power, high speed and small area processor. Pipelined FFT is well known for the highly fast calculation and high precision computation, making it a more reliable FFT to be used in lots of applications. It also requires less hardware, as it uses less multiplier than conventional FFT, minimizing both logic hardware and memory volume. This paper provides a survey on hardware utilization and performance for different size pipelined FFT implemented on a FPGA microchip for 64-point, 128-point and 256-point. This FFT can be used in various applications such as mechanical machinery maintenance system (MMMS). The result shows low total thermal power dissipation and high processing capabilities for all size pipelined FFT studied in this paper. However, bigger size pipelined FFT, requires more design area and memory. In this paper, the biggest size pipelined FFT, only used 7% of the overall total logic elements. It can be concluded that any size pipelined FFT has low power consumption capabilities with high speed performance suitable with any application mentioned earlier.

Item Description

https://ir.uitm.edu.my/id/eprint/38465/1/38465.pdf