InP DHBT-based clock and data recovery circuits for ultra-high-speed optical data links

In this work, up to 80 Gbit/s monolithically integrated clock and data recovery (CDR) circuits with 1:2 demultiplexer are developed. The integrated circuits are manufactured using an InP double heterojunction bipolar transistor (DHBT) technology, featuring cut-off frequency values of more than 250 G...

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Bibliographic Details
Main Author: Makon, Robert Elvis (auth)
Format: Electronic Book Chapter
Language:English
Published: KIT Scientific Publishing 2006
Subjects:
Online Access:DOAB: download the publication
DOAB: description of the publication
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245 1 0 |a InP DHBT-based clock and data recovery circuits for ultra-high-speed optical data links 
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520 |a In this work, up to 80 Gbit/s monolithically integrated clock and data recovery (CDR) circuits with 1:2 demultiplexer are developed. The integrated circuits are manufactured using an InP double heterojunction bipolar transistor (DHBT) technology, featuring cut-off frequency values of more than 250 GHz. The outstanding and (to some extent) record achievements throughout the work make an essential contribution to the development of future optical telecommunication networks operating at 80 Gbit/s. 
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650 7 |a Technology: general issues  |2 bicssc 
653 |a InP DHBT 
653 |a Phase detector 
653 |a Phase-locked loop 
653 |a Optical link 
653 |a Clock and data recovery 
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