Network-on-Chip Architecture, Optimization, and Design Explorations

Limitations of bus-based interconnections related to scalability, latency, bandwidth, and power consumption for supporting the related huge number of on-chip resources result in a communication bottleneck. These challenges can be efficiently addressed with the implementation of a network-on-chip (No...

Full description

Saved in:
Bibliographic Details
Other Authors: Alimi, Isiaka A. (Editor), Aboderin, Oluyomi (Editor), Muga, Nelson J. (Editor), Teixeira, António L. (Editor)
Format: Electronic Book Chapter
Language:English
Published: IntechOpen 2022
Subjects:
Online Access:DOAB: download the publication
DOAB: description of the publication
Tags: Add Tag
No Tags, Be the first to tag this record!

MARC

LEADER 00000naaaa2200000uu 4500
001 doab_20_500_12854_90239
005 20220727
003 oapen
006 m o d
007 cr|mn|---annan
008 20220727s2022 xx |||||o ||| 0|eng d
020 |a intechopen.91110 
020 |a 9781839681585 
020 |a 9781839681486 
020 |a 9781839681592 
040 |a oapen  |c oapen 
024 7 |a 10.5772/intechopen.91110  |c doi 
041 0 |a eng 
042 |a dc 
072 7 |a TJFC  |2 bicssc 
100 1 |a Alimi, Isiaka A.  |4 edt 
700 1 |a Aboderin, Oluyomi  |4 edt 
700 1 |a Muga, Nelson J.  |4 edt 
700 1 |a Teixeira, António L.  |4 edt 
700 1 |a Alimi, Isiaka A.  |4 oth 
700 1 |a Aboderin, Oluyomi  |4 oth 
700 1 |a Muga, Nelson J.  |4 oth 
700 1 |a Teixeira, António L.  |4 oth 
245 1 0 |a Network-on-Chip  |b Architecture, Optimization, and Design Explorations 
260 |b IntechOpen  |c 2022 
300 |a 1 electronic resource (110 p.) 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
506 0 |a Open Access  |2 star  |f Unrestricted online access 
520 |a Limitations of bus-based interconnections related to scalability, latency, bandwidth, and power consumption for supporting the related huge number of on-chip resources result in a communication bottleneck. These challenges can be efficiently addressed with the implementation of a network-on-chip (NoC) system. This book gives a detailed analysis of various on-chip communication architectures and covers different areas of NoCs such as potentials, architecture, technical challenges, optimization, design explorations, and research directions. In addition, it discusses current and future trends that could make an impactful and meaningful contribution to the research and design of on-chip communications and NoC systems. 
540 |a Creative Commons  |f https://creativecommons.org/licenses/by/3.0/  |2 cc  |4 https://creativecommons.org/licenses/by/3.0/ 
546 |a English 
650 7 |a Circuits & components  |2 bicssc 
653 |a Circuits & components 
856 4 0 |a www.oapen.org  |u https://mts.intechopen.com/storage/books/10269/authors_book/authors_book.pdf  |7 0  |z DOAB: download the publication 
856 4 0 |a www.oapen.org  |u https://directory.doabooks.org/handle/20.500.12854/90239  |7 0  |z DOAB: description of the publication