بناء نموذج تحليلي للتأخير في الشبكة المضمّنة على الشريحة باستخدام نظرية الترتيل
The Network-on-Chip architectures suffer from the difficulty of allocating processing resources in the execution time to suit the complex applications implemented on these architectures. In the event of any change in the input traffic, there is no change in the architecture level and its configurati...
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| Main Authors: | , , |
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| Format: | Book |
| Published: |
Tishreen University,
2019-06-01T00:00:00Z.
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| Subjects: | |
| Online Access: | Connect to this object online. |
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Internet
Connect to this object online.3rd Floor Main Library
| Call Number: |
A1234.567 |
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| Copy 1 | Available |